In memory systems that use high-speed serial interfaces, where commands and data are transferred between a host (e.g., system-on-a-chip, computer, graphics controller, etc.) or a plurality of hosts and memory through individual ports, it is desirable to provide maximum bandwidth combined with some error detection to ensure proper system operation.
Serial links have inherent latency because only one bit is sent at a time. Furthermore, the serialization and de-serialization process incurs additional latency. Using the ports individually does not significantly improve latency, and a stylized access method is to be used (e.g., accessing different, dedicated, memory regions from each port, such as in striped accesses) to improve the bandwidth. By enabling port binding (using multiple ports in concert), memory latency can be reduced by having several bits of data transferred at once, while increasing the bandwidth without needing a stylized access method.
Memory also requires a certain amount of data security. For example, in a serial channel, it is possible to have errors occur that cannot be detected except using methods that introduce unacceptable latency. In a bound port situation, some ports remain idle during command periods. This unused bandwidth is filled with duplicates of commands in those same periods. This method extends to single ports using temporal duplication, providing the feature to port configurations.
FIG. 1 illustrates a conventional serial bit assignment 100 in the EIA standard RS-232-C. In the illustration, the serial transfer of data is similar to an RS-232 link where individual binary values (bits) 102-118 are assembled into a whole value 124 by observing them one at a time in turn and assigning them to different significance within the value 124. For example, if the first bit is 104 assigned to the most significant bit in the value 124, the second bit 106 following, and so on until the least significant bit is filled by the last bit 118 communicated. This assembled value in this case is called a frame 128 that includes the value 124 as well as stop and start bits 102, 120. Further, the frame 128 is delineated using extra bits, called framing bits 126 including start bit 120 and stop bit 122, that the receiver can use to find the beginning of a frame 128 and to check whether the frames are arriving when expected. In other schemes, framing bits 126 are used to help the receiver reliably find individual bits even when the data rate between the transmitter and receiver is slightly different or changing.
Communication to memory over individual serial links introduces a great deal of latency, and providing access to a single memory by more than one host introduces memory resource complications. Further, a memory can have one or more ports, each including a serial transmitter and a serial receiver and associated circuitry to improve latency and bandwidth. In a bound port situation, some ports remain idle during command periods. This unused bandwidth is filled with spatial duplicates of commands in the same time periods, and the method extends to single ports using temporal duplication in different time periods, providing the feature to all port configurations. In a bound port situation, data is sent on multiple ports, but commands must stand alone. First, unused ports may include command duplicates. Second, certain commands can be issued at the same time. Furthermore, serial communication increases latency over parallel communication because of serialization, de-serialization, framing the data for error management, and additional processes, such as synchronization.
It is, therefore, desirable to introduce and employ techniques to decrease memory latency.